Z. Shahpar; V. Khatibi; A. Khatibi Bardsiri
Abstract
Software effort estimation plays an important role in software project management, and analogy-based estimation (ABE) is the most common method used for this purpose. ABE estimates the effort required for a new software project based on its similarity to previous projects. A similarity between the projects ...
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Software effort estimation plays an important role in software project management, and analogy-based estimation (ABE) is the most common method used for this purpose. ABE estimates the effort required for a new software project based on its similarity to previous projects. A similarity between the projects is evaluated based on a set of project features, each of which has a particular effect on the degree of similarity between projects and the effort feature. The present study examines the hybrid PSO-SA approach for feature weighting in analogy-based software project effort estimation. The proposed approach was implemented and tested on two well-known datasets of software projects. The performance of the proposed model was compared with other optimization algorithms based on MMRE, MDMRE, and PRED(0.25) measures. The results showed that weighted ABE models provide more accurate and better effort estimates relative to unweighted ABE models and that the PSO-SA hybrid approach has led to better and more accurate results compared with the other weighting approaches in both datasets.
A.R. Tajary; E. Tahanian
Abstract
Wireless network on chip (WiNoC) is one of the promising on-chip interconnection networks for on-chip system architectures. In addition to wired links, these architectures also use wireless links. Using these wireless links makes packets reach destination nodes faster and with less power consumption. ...
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Wireless network on chip (WiNoC) is one of the promising on-chip interconnection networks for on-chip system architectures. In addition to wired links, these architectures also use wireless links. Using these wireless links makes packets reach destination nodes faster and with less power consumption. These wireless links are provided by wireless interfaces in wireless routers. The WiNoC architectures differ in the position of the wireless routers and how they interact with other routers. So, the placement of wireless interfaces is an important step in designing WiNoC architectures. In this paper, we propose a simulated annealing (SA) placement method which considers the routing algorithm as a factor in designing cost function. To evaluate the proposed method, the Noxim, which is a cycle-accurate network-on-chip simulator, is used. The simulation results show that the proposed method can reduce flit latency by up to 24.6% with about a 0.2% increase in power consumption.
